If you are in need of a 3-phase signal generator as opposed to a 3-phase power generator. The following is a description of a process that uses simple digital circuitry and resistor networks. (I have used this method to generate a variety of frequency synthesized sine/cosine signal generators.)
This process requires two CMOS 8-stage serial in/parallel out shift register chips (e.g. SN74HC595) connected in tandem to produce a 16 stage parallel output shift register. The input to the first shift register must be a symmetrical square wave at the frequency of interest. The shift register chips must be clocked at 12X of the needed output frequency. (These two square waves could be most easily obtained from a clock generator whose output is the 12X frequency, and then dividing the clock by 12 to obtain the desired frequency.) The square wave output of each shift register represents a 30 degree segment of the output frequency.
A reasonable approximation to a sine will be produced by a set of resistors that are attached to five consecutive SR outputs. The conductance of these resistors must be related to a sine function as per the table below:
SR output no.___ sine(N/12*Pi)_______Suggested 1% resistor values
1 _____________ 0.500___________ 20K
2_____________ 0.866____________11.5K (nearest value)
3_____________1.000_____________10K
4______________0.866 ___________11.5K
5 _____________0.500 ____________20K
6 _____________ 0.00_____________ (no resistor)
The set of resistors should all be connected together as a summing node. The voltage output at this node will appear as a stepped sign wave whose amplitude ranges from 0 to +5 V. one cycle of the output signal is represented by 12 time segments and six amplitude levels.
The signal’s main harmonic component is at the clocking frequency (12F), and can be reasonably well filtered by using a grounded capacitor at the resistor node (the node resistance for the values given is 2.59K.) The R-C’s cut-off frequency should be set near to or above the desired output frequency, and the capacitor should be precision to prevent phase shift variation that could occur from one generator output to the next. The node’s output should be capacitively coupled to an appropriate buffer amplifier. (If a relatively pure sine wave is required, a third-order Butterworth active filter whose cut-off frequency is somewhat above F would be a good choice.)
The 120 degree output signal would be similarly produced by connecting the same resistor network to SR outputs 5 through 10, and the 240 degree output signal produced by connecting to SR outputs 9 through 14.